Senior Digital Design Engineer D

Farkas Kiss Endre legjobb állása ams AG

Bewerbung fur Senior Digital Design Engineer D

Levél szövege

Lieber ams AG!

Ich möchte mich bei Ihrem Unternehmen als Senior Digital Design Engineer D bewerben. 
Ich bin ein Fullstack-Entwickler, bei dem ich meine 10-jährige Erfahrung mit verschiedenen Technologien einsetzen kann.

Ich habe meinen Lebenslauf an diese E-Mail angehängt.

Wir freuen uns darauf, von Ihnen zu hören!


Endre Farkas Kiss "Sodika"
Java and PHP Fullstack Developer, Nudist, Vlogger

https://www.linkedin.com/in/farkas-kiss-63bb9210a
https://sodika.org

Álláshirdetés szövege

Deine Rolle im Team
Digital design based on system and block level documentations
Maintain micro-architecture design and create design documents of design and evaluation
Work closely with Technical Lead (Digital) for chip design / system optimization to ensure low power, timing, robust design and state of the art implementation
Create constrains for layout generation, work with design team to resolve design and layout constraints
Ensure that designed chip module meets customer specifications and needs
Work with design team to resolve design and verification related issues
Implement chip design guidelines to ensure reliability and re-usage
Develop best practices to reduce power, die size and timing

Technologien und Skills
Verilog
Micro
Synopsys

Unsere Erwartungen an dich:
Qualifikationen
Strong knowledge of hardware description languages e.g. Verilog, System Verilog
Competence in developing design constraints and Synthesis scripts (Synopsys DC)
Proficiency in developing block and top level Timing constraints for STA (Static Timing Analysis) and PR (Place and Rout) handoff
Knowledge of concepts for design reuse
Ability to work independently and self-dependently in a motivated and committed team
Keep commitments for schedule and quality
Good communication skills in English

Erfahrung
Experience in UVM (Universal Verification Methodology) would be definitely a plus, Hands-on and knowledge of digital design tools e.g synthesis, LEC (logic equivalence check), CDC (clock domain crossing) DFT(Scan+ATPG tests, BIST)

Ausbildung
Degree or Diploma in Engineering 7+ years' experience in digital / mixed-signal ICs design

Benefits
Mitarbeitervergünstigungen
Kantine/Betriebsrestaurant
Team Events
Firmenauto
Betriebsarzt
Kaffee, Tee o. Ä